The invention relates generally to thermal-dissipation techniques for integrated-circuit technology and more specifically relates to multichip thin-film interconnect modules having high thermal dissipation requirements.
The present technology for packaging integrated circuits typically involves placement of a plurality of integrated circuits on a relatively large multiplayer board. The boards are typically formed of glass epoxy or thick polyimide substrates. In conventional dip-packaging technology, the integrated circuit chips are typically widely spaced on the board such that the power density required to be dissipated is on the order of less than 0.2 watts per centimeter square. As the speed of the semiconductor circuits increases, the integrated circuit chips must be placed closer together in order to preserve the high performance characteristics of the integrated circuit chips. Furthermore, the power dissipation per chip also drastically increases as the speed of the integrated circuit chips increases. As a result, the anticipated power density can be as high as six watts per centimeter square in future generations of high speed computers.
Thus, one of the objectives of packaging techniques for future generation integrated-circuit devices is to be able to dissipate significantly more heat than is currently being dissipated using traditional packaging technology. Another problem associated with increased heat dissipation and generation is that any thermal mismatch between the integrated-circuit chip package and its underlying multilayer circuit board will be undesirably intensified.
As is well known in the art, conventional integrated-circuit chips are encased in a plastic material which has relatively low thermal conductivity. One approach other have taken in the past to enhance the thermal conductivity of the integrated circuit package is to encase the chip in other materials such as beryllia (BeO) which is a ceramic having relativety high thermal conductivity. However, one disadvantage of this technique is that BeO is very toxic and, thus, is undesirable to use.
Attempts to alleviate the problem of thermal mismatch between an integrated circuit package and an underlying circuit board have included eliminating the traditional plastic package around the integrated circuit and placing the integrated circuit chip directly on a silicon substrate. The silicon substrate has essentially the same thermal expansion characteristics as the integrated-circuit chip. However, even with this advancement over the prior art, it is still desirable to increase the thermal dissipation capacity of future packaging techniques for integrated circuits in view of the expected heat generation characteristics of such future circuit.